SECTION I · THE BRIEF
Brief #09853Updated 03 JUN 2026BENGALURUGreenhouseSV ANGEL
Employbl Company Profile

Senior/Staff- Engineer: Post Silicon- Bring Up

Cerebras is a stealth-mode startup backed by premier venture capitalists and industry leading technologists. We are serially successful entrepreneurs dedicated to solving problems others are afraid to tackle. We value…

Location
Bengaluru
Company size
200–1,000
Posted
1mo ago
Via
Greenhouse
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Senior/Staff- Engineer: Post Silicon- Bring Up - Cerebras Systems

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Job Title
Senior/Staff- Engineer: Post Silicon- Bring Up
Job Location
Bengaluru, Karnataka, India; Sunnyvale, CA; Toronto, Ontario, Canada
Job Description

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.  

Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. 

Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.

The Role:
In this exciting role, you will be responsible for bring up and optimizations of Cerebras’s Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization.


Responsibilities:

  • On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs 
  • Work on refining AI Systems across H/W-S/W design constraints such as di/dt, V-F characterization space, current and temperature limits in relation to optimizations for performance.
  • Develop/Enhance infrastructure to enable silicon for real world workload testing
  • Develop self-checking metrics, as well as instrumentation for debug and coverage
  • Work with the silicon architects/designers, performance engineers and software engineers to enhance performance of Wafer Scale Engines.
  • Work across domains such as, Software, Design, Verification, Emulation & Validation to refine and optimize performance and process.
  • Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge and release flows to streamline test and release.

Skills & Qualifications:

  • BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience
  • 7-10+ years of industry experience
  • 3-5 years of experience in Pre-silicon & Post Silicon ASIC hardware
  • Good understanding of computer architecture and networking
  • Excellent Coding in languages such as Python/Verilog/System Verilog and C
  • Proficient in hardware/software codesign and layered architectures.
  • Excellent debugging, analytical, and problem-solving skills
  • Proficient in large scale testing and automation using pytest and python
  • Good presentation skills to refine diverse information and put forth optimization strategies and results.
  • Good interpersonal skills, ability & desire to work as a standout colleague
  • Proven track record of working cross-functionally learning fast and driving issues to closure 

Preferred:

  • Previous work in AI-ML with 100+ CPU core & communication fabric-based design.
  • Familiarity with in-line testing and diagnostics using CPU memory and execution with self-checking.
  • Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack
  • Familiarity in creating test and s/w infrastructure at large scale
  • Working across global time zones 

Location:
Bangalore, India

Toronto, Canada

Sunnyvale, California.

 

For Sunnyvale: The base salary range for this position is $175,000 to $275,000 annually.  Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

Why Join Cerebras

People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection  point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

  1. Build a breakthrough AI platform beyond the constraints of the GPU.
  2. Publish and open source their cutting-edge AI research.
  3. Work on one of the fastest AI supercomputers in the world.
  4. Enjoy job stability with startup vitality.
  5. Our simple, non-corporate work culture that respects individual beliefs.

Read our blog: Five Reasons to Join Cerebras in 2026.

Apply today and become part of the forefront of groundbreaking advancements in AI!


Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.


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Cerebras Systems Headquarters Location

Sunnyvale, CA

View company profile

Cerebras Systems Company Size

Between 200 - 1,000 employees

Cerebras Systems Founded Year

2016

Cerebras Systems Total Amount Raised

$1,820,199,936

Cerebras Systems Funding Rounds

View funding details
  • Debt Financing

    $850M

  • Series H

    $1B

  • Debt Financing

    $1B

  • IPO

    Unknown

  • Series G

    $1.1B

  • Series G

    $1.1B

  • Series F

    $250M

  • Series F

    $250M

  • Series E

    $272M

  • Series E

    $272M

  • Series D

    $81M

  • Series D

    $81M

  • Series C

    $65M

  • Series C

    $65M

  • Series B

    $25M

  • Series B

    $25M

  • Series A

    $27.2M

  • Series A

    $27.2M