SOC Physical Design Integration Lead - Cerebras Systems

Job Title: SOC Physical Design Integration Lead
Job Location: Remote Office; Sunnyvale, CA
Job Listing URL: https://job-boards.greenhouse.io/cerebrassystems/jobs/6592965003
Job Description: Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs.

Cerebras' current customers include global corporations across multiple industries, national labs, and top-tier healthcare systems. In January, we announced a multi-year, multi-million-dollar partnership with Mayo Clinic, underscoring our commitment to transforming AI applications across various fields. In August, we launched Cerebras Inference, the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services.

Role

Join our close-knit physical design team where you'll excel in synthesizing, placing, routing and integrating high speed designs. Experience the full spectrum of physical design and implementation, collaborating closely with the RTL team and integrating these blocks seamlessly into the full-chip architecture.

Minimum Skills & Qualifications

10+ years of physical design, integration & physical verification experience.

Strong knowledge of block level and full-chip physical verification methodology.

Experience with the complete physical design flow.

Skills in Design Compiler, Fusion Compiler, ICC2 or similar physical design tools

Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.

Expert with IR/EM analysis and resolution

Good understanding of full chip floor planning and integration.

Strong experience in full chip timing closure

Demonstrated ability to work with RTL teams to optimize for physical design

Ability to independently debug and resolve physical verification Issues

BS or MS in Electrical Engineering

Preferred Skills:

Knowledge of Synopsys tool suite is a plus.

Good scripting skills with languages like Tcl and Python. Ability to make flow enhancements.

Why Join Cerebras

People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:

Build a breakthrough AI platform beyond the constraints of the GPU.

Publish and open source their cutting-edge AI research.

Work on one of the fastest AI supercomputers in the world.

Enjoy job stability with startup vitality.

Our simple, non-corporate work culture that respects individual beliefs.

Read our blog: Five Reasons to Join Cerebras in 2025.

Apply today and become part of the forefront of groundbreaking advancements in AI!

Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.

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