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HVM Product Engineering Manager - Astera Labs

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Job Title
HVM Product Engineering Manager
Job Location
Santa Clara, CA
Job Description

Astera Labs is a global leader delivering semiconductor-based connectivity solutions purpose-built to unleash the full potential of intelligent data infrastructure at cloud-scale. Our class-defining first-to-market products based on PCIe, CXL, and Ethernet technologies deliver critical connectivity for high-value artificial intelligence and machine learning applications. Our focus on customer-driven product definition and commitment to design solutions in the cloud, for the cloud, results in breakthrough execution and scale for our customers. We are headquartered in the heart of California’s Silicon Valley, with R&D centers and offices in Taiwan, China, Vancouver and Toronto, Canada, and Haifa, Israel.

As an Astera Labs HVM Product Engineering Manager, you will lead develop and lead the global High Volume Manufacturing team. Being able to produce quality semiconductor products to meet our customers’ volume and requested ship dates is the main objective. In this role, you will compliment the New Product Introduction Product Engineers as products are released into production and own the engineering manufacturing during mass production.

Basic qualifications:

  • Minimum of 3 years of experience leading a high caliber semiconductor product engineering team with a focus on maintaining multiple products during high volume manufacturing
  • Minimum of 5 years within a product engineering experience rolling semiconductor devices into production
  • Strong academic/technical background in electrical engineering; Bachelor’s is required;
  • Proven track record with working across different off shore manufacturing sites (OSATs)
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks
  • Strong team player with excellent communication skills

Required experience:

  • Proven track record continuing seamless production of semiconductor products partnering with OSATs supporting high volume manufacturing through the complete product lifecycle
  • Energetic work mindset meeting the demands of shipping quality units to Astera Labs’ customers enabling mass production for new products
  • Hands on experience with using the Advantest 93k ATE platform
  • Detailed mindset monitoring device ATE test yields, ATE test time, device quality and rolling out new ATE test programs using consistent BKMs
  • Strong data analysis skills using tools such as JMP or Spotfire calculating limits and drawing conclusions
  • Hands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe, Ethernet (25G and above), etc. and/or memory interfaces such as (LP)DDR5/4/3.
  • Demonstrated knowledge of common SerDes architecture such as CTLE, DFE, FFE, and DSP.

Preferred experience:

  • Working with silicon validation teams to ensure device performance meets production requirements.
  • Firmware development in C/C++, scripting in Python, or other equivalent programming experience.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

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Astera Labs Headquarters Location

Santa Clara, CA

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Astera Labs Company Size

Between 100 - 500 employees

Astera Labs Founded Year


Astera Labs Total Amount Raised


Astera Labs Funding Rounds

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  • Series D

    $150,000,000 USD

  • Series C

    $50,000,000 USD

  • Series Unknown

    $6,350,000 USD

Astera Labs' Tech Stack

Astera Labs' Investors